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| Order this document by MC34071/D MC34071,2,4,A MC33071,2,4,A High Slew Rate, Wide Bandwidth, Single Supply Operational Amplifiers Quality bipolar fabrication with innovative design concepts are employed for the MC33071/72/74, MC34071/72/74 series of monolithic operational amplifiers. This series of operational amplifiers offer 4.5 MHz of gain bandwidth product, 13 V/s slew rate and fast setting time without the use of JFET device technology. Although this series can be operated from split supplies, it is particularly suited for single supply operation, since the common mode input voltage range includes ground potential (VEE). With A Darlington input stage, this series exhibits high input resistance, low input offset voltage and high gain. The all NPN output stage, characterized by no deadband crossover distortion and large output voltage swing, provides high capacitance drive capability, excellent phase and gain margins, low open loop high frequency output impedance and symmetrical source/sink AC frequency response. The MC33071/72/74, MC34071/72/73 series of devices are available in standard or prime performance (A Suffix) grades and are specified over the commercial, industrial/vehicular or military temperature ranges. The complete series of single, dual and quad operational amplifiers are available in plastic DIP and SOIC surface mount packages. * Wide Bandwidth: 4.5 MHz HIGH BANDWIDTH SINGLE SUPPLY OPERATIONAL AMPLIFIERS 8 1 8 1 P SUFFIX PLASTIC PACKAGE CASE 626 D SUFFIX PLASTIC PACKAGE CASE 751 (SO-8) PIN CONNECTIONS Offset Null Inputs VEE 1 2 3 4 - + 8 7 6 5 NC VCC Output Offset Null * * * * * * * * * * * * High Slew Rate: 13 V/s Fast Settling Time: 1.1 s to 0.1% Wide Single Supply Operation: 3.0 V to 44 V Wide Input Common Mode Voltage Range: Includes Ground (VEE) Low Input Offset Voltage: 3.0 mV Maximum (A Suffix) Large Output Voltage Swing: -14.7 V to +14 V (with 15 V Supplies) Large Capacitance Drive Capability: 0 pF to 10,000 pF Low Total Harmonic Distortion: 0.02% Excellent Phase Margin: 60 Excellent Gain Margin: 12 dB Output Short Circuit Protection ESD Diodes/Clamps Provide Input Protection for Dual and Quad ORDERING INFORMATION Op Amp Function Single Device MC34071P, AP MC34071D, AD MC33071P, AP MC33071D, AD Dual MC34072P, AP MC34072D, AD MC33072P, AP MC33072D, AD Quad MC34074P, AP MC34074D, AD MC33074P, AP MC33074D, AD Operating Temperature Range TA = 0 to +70C TA = -40 to +85C TA = 0 to +70C TA = -40 to +85C TA = 0 to +70C TA = -40 to +85C Package Plastic DIP SO-8 Plastic DIP SO-8 Plastic DIP SO-8 Plastic DIP SO-8 Plastic DIP SO-14 Plastic DIP SO-14 (c) Motorola, Inc. 1996 14 1 (Single, Top View) Output 1 Inputs 1 VEE 1 2 3 4 - + - + 8 7 6 5 VCC Output 2 Inputs 2 (Dual, Top View) 14 1 P SUFFIX PLASTIC PACKAGE CASE 646 D SUFFIX PLASTIC PACKAGE CASE 751A (SO-14) PIN CONNECTIONS Output 1 Inputs 1 VCC Inputs 2 6 1 2 3 4 5 + - - + 1 4 - + 14 13 Output 4 Inputs 4 12 11 VEE Inputs 3 Output 3 2 3 + - 10 9 8 Output 2 7 (Quad, Top View) Rev 0 MOTOROLA ANALOG IC DEVICE DATA 1 MC34071,2,4,A MC33071,2,4,A MAXIMUM RATINGS Rating Supply Voltage (from VEE to VCC) Input Differential Voltage Range Input Voltage Range Output Short Circuit Duration (Note 2) Operating Junction Temperature Storage Temperature Range Symbol VS VIDR VIR tSC TJ Tstg Value +44 Note 1 Note 1 Indefinite +150 -60 to +150 Unit V V V sec C C NOTES: 1. Either or both input voltages should not exceed the magnitude of VCC or VEE. 2. Power dissipation must be considered to ensure maximum junction temperature (TJ) is not exceeded (see Figure 1). Representative Schematic Diagram (Each Amplifier) VCC Q3 Q1 Q2 R1 Bias - Inputs + C2 D3 Q19 Base Current Cancellation Q13 Q12 D1 R5 R3 R4 Current Limit Q14 Q15 Q16 Q8 Q9 Q10 C1 R2 Q11 Q4 Q5 Q6 Q7 Q17 D2 R6 R7 Output R8 Q18 VEE/Gnd Offset Null (MC33071, MC34071 only) 2 MOTOROLA ANALOG IC DEVICE DATA MC34071,2,4,A MC33071,2,4,A ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, RL = connected to ground, unless otherwise noted. See Note 3 for TA = Tlow to Thigh) A Suffix Characteristics Input Offset Voltage (RS = 100 , VCM = 0 V, VO = 0 V) VCC = +15 V, VEE = -15 V, TA = +25C VCC = +5.0 V, VEE = 0 V, TA = +25C VCC = +15 V, VEE = -15 V, TA = Tlow to Thigh Average Temperature Coefficient of Input Offset Voltage RS = 10 , VCM = 0 V, VO = 0 V, TA = Tlow to Thigh Input Bias Current (VCM = 0 V, VO = 0 V) TA = +25C TA = Tlow to Thigh Input Offset Current (VCM = 0 V, VO = 0V) TA = +25C TA = Tlow to Thigh Input Common Mode Voltage Range TA = +25C TA = Tlow to Thigh Large Signal Voltage Gain (VO = 10 V, RL = 2.0 k) TA = +25C TA = Tlow to Thigh Output Voltage Swing (VID = 1.0 V) VCC = +5.0 V, VEE = 0 V, RL = 2.0 k, TA = +25C VCC = +15 V, VEE = -15 V, RL = 10 k, TA = +25C VCC = +15 V, VEE = -15 V, RL = 2.0 k, TA = Tlow to Thigh VCC = +5.0 V, VEE = 0 V, RL = 2.0 k, TA = +25C VCC = +15 V, VEE = -15 V, RL = 10 k, TA = +25C VCC = +15 V, VEE = -15 V, RL = 2.0 k, TA = Tlow to Thigh Output Short Circuit Current (VID = 1.0 V, VO = 0 V, TA = 25C) Source Sink Common Mode Rejection RS 10 k, VCM = VICR, TA = 25C Power Supply Rejection (RS = 100 ) VCC/VEE = +16.5 V/-16.5 V to +13.5 V/-13.5 V, TA = 25C Power Supply Current (Per Amplifier, No Load) VCC = +5.0 V, VEE = 0 V, VO = +2.5 V, TA = +25C VCC = +15 V, VEE = -15 V, VO = 0 V, TA = +25C VCC = +15 V, VEE = -15 V, VO = 0 V, TA = Tlow to Thigh NOTES: 3. Tlow = -40C for MC33071, 2, 4, /A = 0C for MC34071, 2, 4, /A Non-Suffix Max 3.0 3.0 5.0 -- Min -- -- -- -- Typ 1.0 1.5 -- 10 Max 5.0 5.0 7.0 -- V/C Unit mV Symbol VIO Min -- -- -- -- Typ 0.5 0.5 -- 10 VIO/T IIB -- -- IIO -- -- VICR VEE to (VCC -1.8) VEE to (VCC -2.2) AVOL 50 25 VOH 3.7 13.6 13.4 VOL 4.0 14 -- 0.1 -14.7 -- -- -- -- 0.3 -14.3 -13.5 3.7 13.6 13.4 -- -- -- 4.0 14 -- 0.1 -14.7 -- -- -- -- 0.3 -14.3 -13.5 100 -- -- -- 25 20 100 -- -- -- VEE to (VCC -1.8) VEE to (VCC -2.2) 6.0 -- 50 300 -- -- 6.0 -- 75 300 100 -- 500 700 -- -- 100 -- 500 700 nA nA V V/mV V -- -- -- V ISC 10 20 CMR PSR 80 80 30 30 97 97 -- -- -- -- 10 20 70 70 30 30 97 97 -- -- -- -- mA dB dB ID -- -- -- 1.6 1.9 -- 2.0 2.5 2.8 -- -- -- 1.6 1.9 -- 2.0 2.5 2.8 mA Thigh = +85C for MC33071, 2, 4, /A = +70C for MC34071, 2, 4, /A MOTOROLA ANALOG IC DEVICE DATA 3 MC34071,2,4,A MC33071,2,4,A AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = -15 V, RL = connected to ground. TA = +25C, unless otherwise noted.) A Suffix Characteristics Slew Rate (Vin = -10 V to +10 V, RL = 2.0 k, CL = 500 pF) AV = +1.0 AV = -1.0 Setting Time (10 V Step, AV = -1.0) To 0.1% (+1/2 LSB of 9-Bits) To 0.01% (+1/2 LSB of 12-Bits) Gain Bandwidth Product (f = 100 kHz) Power Bandwidth AV = +1.0, RL = 2.0 k, VO = 20 Vpp, THD = 5.0% Phase margin RL = 2.0 k RL = 2.0 k, CL = 300 pF Gain Margin RL = 2.0 k RL = 2.0 k, CL = 300 pF Equivalent Input Noise Voltage RS = 100 , f = 1.0 kHz Equivalent Input Noise Current f = 1.0 kHz Differential Input Resistance VCM = 0 V Differential Input Capacitance VCM = 0 V Total Harmonic Distortion AV = +10, RL = 2.0 k, 2.0 Vpp VO 20 Vpp, f = 10 kHz Channel Separation (f = 10 kHz) Open Loop Output Impedance (f = 1.0 MHz) Symbol SR 8.0 -- ts -- -- GBW BW fm -- -- Am -- -- en in Rin Cin THD -- |ZO| -- -- -- -- -- -- -- 12 4.0 32 0.22 150 2.5 0.02 120 30 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 12 4.0 32 0.22 150 2.5 0.02 120 30 -- -- -- -- -- -- -- -- -- nV/ Hz pA/ Hz M pF % dB W 60 40 -- -- -- -- 60 40 -- -- dB 3.5 -- 1.1 2.2 4.5 160 -- -- -- -- -- -- 3.5 -- 1.1 2.2 4.5 160 -- -- -- -- MHz kHz Deg 10 13 -- -- 8.0 -- 10 13 -- -- s Min Typ Max Min Non-Suffix Typ Max Unit V/s Figure 1. Power Supply Configurations Figure 2. Offset Null Circuit VCC 7 - + 4 2 10 k 3 5 6 1 Single Supply 3.0 V to 44 V VCC 1 2 3 4 VEE VEE VCC Split Supplies VCC+|VEE|44 V 2 VCC 3 1 VEE Offset nulling range is approximately 80 mV with a 10 k potentiometer (MC33071, MC34071 only). VEE 4 4 MOTOROLA ANALOG IC DEVICE DATA MC34071,2,4,A MC33071,2,4,A Figure 3. Maximum Power Dissipation versus Temperature for Package Types P D , MAXIMUM POWER DISSIPATION (mW) 2400 2000 1600 SO-14 Pkg 1200 800 400 0 -55 -40 -20 SO-8 Pkg 8 & 14 Pin Plastic Pkg V V IO , INPUT OFFSET VOLTAGE (mV) 4.0 2.0 0 -2.0 -4.0 -55 -25 0 25 50 75 100 125 VCC = +15 V VEE = -15 V VCM = 0 Figure 4. Input Offset Voltage versus Temperature for Representative Units 0 20 40 60 80 100 120 140 160 TA, AMBIENT TEMPERATURE (C) TA, AMBIENT TEMPERATURE (C) V ICR , INPUT COMMON MODE VOLTAGE RANGE (V) Figure 5. Input Common Mode Voltage Range versus Temperature VCC VCC VCC -0.8 VCC -1.6 VCC -2.4 VEE +0.01 VEE VEE -55 -25 0 25 50 75 100 125 VCC/VEE = +1.5 V/ -1.5 V to +22 V/ -22 V Figure 6. Normalized Input Bias Current versus Temperature I IB, INPUT BIAS CURRENT (NORMALIZED) 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -55 VCC = +15 V VEE = -15 V VCM = 0 -25 0 25 50 75 100 125 TA, AMBIENT TEMPERATURE (C) TA, AMBIENT TEMPERATURE (C) Figure 7. Normalized Input Bias Current versus Input Common Mode Voltage I IB, INPUT BIAS CURRENT (NORMALIZED) 1.4 VO, OUTPUT VOLTAGE SWING (Vpp ) VCC = +15 V VEE = -15 V TA = 25C 50 40 30 Figure 8. Split Supply Output Voltage Swing versus Supply Voltage RL Connected to Ground TA = 25C 1.2 1.0 RL = 10 k 20 10 0 RL = 2.0 k 0.8 0.6 -12 -8.0 -4.0 0 4.0 8.0 12 0 5.0 10 15 20 25 VIC, INPUT COMMON MODE VOLTAGE (V) VCC, |VEE|, SUPPLY VOLTAGE (V) MOTOROLA ANALOG IC DEVICE DATA 5 MC34071,2,4,A MC33071,2,4,A Figure 9. Single Supply Output Saturation versus Load Resistance to VCC Vsat , OUTPUT SATURATION VOLTAGE (V) Vsat , OUTPUT SATURATION VOLTAGE (V) VCC VCC VCC -1.0 Source VCC -2.0 VEE +2.0 VEE +1.0 VEE Sink VEE 0 5.0 10 IL, LOAD CURRENT ( mA) 15 20 VCC/VEE = +5.0 V/ -5.0 V to +22 V/ -22 V TA = 25C VCC Figure 10. Split Supply Output Saturation versus Load Current VCC VCC = +15 V RL = Gnd TA = 25C VCC -2.0 VCC -4.0 0.2 0.1 Gnd 0 100 1.0 k 10 k 100 k RL, LOAD RESISTANCE TO GROUND () Figure 11. Single Supply Output Saturation versus Load Resistance to Ground Vsat , OUTPUT SATURATION VOLTAGE (V) 0 I SC, OUTPUT CURRENT (mA) VCC -0.4 -0.8 2.0 1.0 Gnd 100 1.0 k 10 k RL, LOAD RESISTANCE TO VCC () 100 k 60 50 40 Figure 12. Output Short Circuit Current versus Temperature Sink Source 30 20 10 0 -55 VCC = +15 V VEE = -15 V RL 0.1 Vin = 1.0 V -25 0 25 50 75 TA, AMBIENT TEMPERATURE (C) 100 125 VCC = +15 V RL to VCC TA = 25C Figure 13. Output Impedance versus Frequency 50 VO, OUTPUT VOLTAGE SWING (Vpp ) Z O, OUTPUT IMPEDANCE ( ) VCC = +15 V VEE = -15 V 40 VCM = 0 VO = 0 IO = 0.5 mA 30 TA = 25C 20 AV = 1000 10 0 1.0 k AV = 100 AV = 10 AV = 1.0 28 24 20 16 12 8.0 4.0 0 3.0 k Figure 14. Output Voltage Swing versus Frequency VCC = +15 V VEE = -15 V AV = +1.0 RL = 2.0 k THD 1.0% TA = 25C 10 k 100 f, FREQUENCY (Hz) 1.0 M 10 M 10 k 30 k 100 k 300 k f, FREQUENCY (Hz) 1.0 M 3.0 M 6 MOTOROLA ANALOG IC DEVICE DATA MC34071,2,4,A MC33071,2,4,A Figure 15. Total Harmonic Distortion versus Frequency THD, TOTAL HARMONIC DISTORTION (%) THD, TOTAL HARMONIC DISTORTION (%) 0.4 AV = 1000 0.3 VCC = +15 V VEE = -15 V VO = 2.0 Vpp RL = 2.0 k TA = 25C 4.0 VCC = +15 V VEE = -15 V RL = 2.0 k TA = 25C Figure 16. Total Harmonic Distortion versus Output Voltage Swing 3.0 AV = 1000 0.2 AV = 100 0.1 AV = 10 0 10 100 1.0 k f, FREQUENCY (Hz) 2.0 AV = 100 1.0 AV = 10 AV = 1.0 0 0 4.0 8.0 12 16 20 VO, OUTPUT VOLTAGE SWING (Vpp) AV = 1.0 10 k 100 k Figure 17. Open Loop Voltage Gain versus Temperature AVOL , OPEN LOOP VOLTAGE GAIN (dB) AVOL , OPEN LOOP VOLTAGE GAIN (dB) 116 112 108 104 100 96 -55 VCC = +15 V VEE = -15 V VO= -10 V to +10 V RL = 10 k f 10Hz 100 Figure 18. Open Loop Voltage Gain and Phase versus Frequency 0 80 Phase 60 40 VCC = +15 V VEE = -15 V 20 VO = 0 V RL = 2.0 k TA = 25C 0 1.0 10 100 Phase Margin = 60 90 135 180 1.0 k 10 k 100 k 1.0 M 10 M 100 M Gain 45 , EXCESS PHASE (DEGREES) 125 -25 0 25 50 75 100 125 TA, AMBIENT TEMPERATURE (C) f, FREQUENCY (Hz) AVOL , OPEN LOOP VOLTAGE GAIN (dB) 20 10 0 -10 GBW, GAIN BANDWIDTH PRODUCT (NORMALIED) Figure 19. Open Loop Voltage Gain and Phase versus Frequency 1 Phase Margin = 60 Gain Margin = 12 dB 100 120 140 1. Phase RL = 2.0 k 2. Phase RL = 2.0 k, CL = 300 pF -20 3. Gain R = 2.0 k L 4. Gain RL = 2.0 k, CL = 300 pF -30 VCC = +15 V VEE = 15 V V =0V TA = 25C -40 O 1.0 2.0 3.0 5.0 7.0 160 180 4 2 10 20 30 , EXCESS PHASE (DEGREES) Figure 20. Normalized Gain Bandwidth Product versus Temperature 1.15 1.1 1.05 1.0 0.95 0.9 0.85 -55 VCC = +15 V VEE = -15 V RL = 2.0 k 3 -25 0 25 50 75 100 f, FREQUENCY (MHz) TA, AMBIENT TEMPERATURE (C) MOTOROLA ANALOG IC DEVICE DATA 7 MC34071,2,4,A MC33071,2,4,A Figure 21. Percent Overshoot versus Load Capacitance 100 m , PHASE MARGIN (DEGREES) 80 60 40 20 0 VCC = +15 V VEE = -15 V RL = 2.0 k VO = -10 V to +10 V TA = 25C 70 60 50 40 30 20 10 0 10 100 1.0 k 10 k VCC = +15 V VEE = -15 V AV = +1.0 RL = 2.0 k to VO = -10 V to +10 V TA = 25C Figure 22. Phase Margin versus Load Capacitance PERCENT OVERSHOOT R 10 100 1.0 k 10 k CL, LOAD CAPACITANCE (pF) CL, LOAD CAPACITANCE (pF) Figure 23. Gain Margin versus Load Capacitance 14 12 A m , GAIN MARGIN (dB) 10 8.0 6.0 4.0 2.0 0 10 100 1.0 k 10 k CL, LOAD CAPACITANCE (pF) m , PHASE MARGIN (DEGREES) VCC = +15 V VEE = -15 V AV = +1.0 RL = 2.0 k to VO = -10 V to +10 V TA = 25C 80 Figure 24. Phase Margin versus Temperature CL = 10 pF 60 CL = 100 pF VCC = +15 V VEE = -15 V AV = +1.0 RL = 2.0 k to VO = -10 V to +10 V 40 20 CL = 1,000 pF CL = 10,000 pF 0 -55 -25 0 25 50 75 100 125 TA, AMBIENT TEMPERATURE (C) Figure 25. Gain Margin versus Temperature 16 VCC = +15 V A m , GAIN MARGIN (dB) 12 VEE = -15 V AV = +1.0 RL = 2.0 k to VO = -10 V to +10 V A m , GAIN MARGIN (dB) CL = 10 pF 12 10 8.0 6.0 4.0 2.0 0 0 -55 -25 0 25 50 75 100 125 1.0 Figure 26. Phase Margin and Gain Margin versus Differential Source Resistance 70 Gain R1 R2 - + VO 60 50 40 30 8.0 CL = 100 pF CL = 10,000 pF 4.0 CL = 1,000 pF VCC = +15 V VEE = -15 V RT = R1 + R2 AV = +100 VO = 0 V TA = 25C 10 100 Phase 20 10 1.0 k 10 k 0 100 k TA, AMBIENT TEMPERATURE (C) RT, DIFFERENTIAL SOURCE RESISTANCE () 8 MOTOROLA ANALOG IC DEVICE DATA m , PHASE MARGIN (DEGREES) MC34071,2,4,A MC33071,2,4,A Figure 27. Normalized Slew Rate versus Temperature 1.15 SR, SLEW RATE (NORMALIZED) 1.1 1.05 1.0 0.95 0.9 0.85 -55 VCC = +15 V VEE = -15 V AV = +1.0 RL = 2.0 k CL = 500 pF V O , OUTPUT VOLTAGE SWING FROM 0 V (V) Figure 28. Output Settling Time 10 1.0 mV 10 mV 5.0 1.0 mV VCC = +15 V VEE = -15 V AV = -1.0 TA = 25C Compensated Uncompensated 1.0 mV 10 mV 1.0 mV -10 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 -5.0 -25 0 25 50 75 100 125 TA, AMBIENT TEMPERATURE (C) ts, SETTLING TIME (s) Figure 29. Small Signal Transient Response Figure 30. Large Signal Transient Reponse VCC = +15 V VEE = -15 V AV = +1.0 RL = 2.0 k CL = 300 pF TA = 25C 50 mV/DIV 5.0 V/DIV 2.0 s/DIV 0 VCC = +15 V VEE = -15 V AV = +1.0 RL = 2.0 k CL = 300 pF TA = 25C 0 1.0 s/DIV Figure 31. Common Mode Rejection versus Frequency CMR, COMMON MODE REJECTION (dB) 100 80 60 40 VCM Figure 32. Power Supply Rejection versus Frequency 100 PSR, POWER SUPPLY REJECTION (dB) VCC = +15 V VEE = -15 V TA = 25C VO VEE +PSR = 20 Log VO/ADM VCC VO/ADM VEE TA = 125C TA = 25C TA = -55C VCC = +15 V VEE = -15 V VCM = 0 V VCM = 1.5 V 80 VCC 60 40 20 - ADM + (VCC = +1.5 V) - ADM + +PSR VO 20 CMR = 20 Log VCM x ADM VO -PSR = 20 Log 0 0.1 1.0 10 100 1.0 k 10 k 100 k 1.0 M 10 M 0 0.1 -PSR (VEE = +1.5 V) 1.0 k 10 k 100 k 1.0 M 10 M 1.0 10 100 f, FREQUENCY (Hz) f, FREQUENCY (Hz) MOTOROLA ANALOG IC DEVICE DATA 9 MC34071,2,4,A MC33071,2,4,A Figure 33. Supply Current versus Supply Voltage PSR, POWER SUPPLY REJECTION (dB) 9.0 I CC , SUPPLY CURRENT (mA) 8.0 7.0 6.0 TA = 125C 5.0 4.0 0 5.0 10 15 20 25 VCC, |VEE|, SUPPLY VOLTAGE (V) TA = -55C 105 -PSR (VEE = +1.5 V) 95 +PSR (VCC = +1.5 V) 85 +PSR = 20 Log VO/ADM VCC VO/ADM VEE VCC - ADM + VEE VO Figure 34. Power Supply Rejection versus Temperature VCC = +15 V VEE = -15 V TA = 25C 75 -PSR = 20 Log 65 -55 -25 0 25 50 75 100 125 TA, AMBIENT TEMPERATURE (C) Figure 35. Channel Separation versus Frequency en , INPUT NOICE VOLTAGE ( nV Hz ) 120 CHANNEL SEPARATION (dB) 100 80 60 40 20 0 10 20 30 50 70 100 200 300 f, FREQUENCY (kHz) VCC = +15 V VEE = -15 V TA = 25C 70 60 50 40 30 20 10 0 10 Figure 36. Input Noise versus Frequency 2.8 VCC = +15 V VEE = -15 V VCM = 0 TA = 25C Voltage 2.4 2.0 1.6 1.2 Current 0.8 0.4 100 1.0 k f, FREQUENCY (kHz) 10 k 0 100 k i n , INPUT NOISE CURRENT (pA Hz ) APPLICATIONS INFORMATION CIRCUIT DESCRIPTION/PERFORMANCE FEATURES Although the bandwidth, slew rate, and settling time of the MC34071 amplifier series are similar to op amp products utilizing JFET input devices, these amplifiers offer other additional distinct advantages as a result of the PNP transistor differential input stage and an all NPN transistor output stage. Since the input common mode voltage range of this input stage includes the VEE potential, single supply operation is feasible to as low as 3.0 V with the common mode input voltage at ground potential. The input stage also allows differential input voltages up to 44 V, provided the maximum input voltage range is not exceeded. Specifically, the input voltages must range between VEE and VCC supply voltages as shown by the maximum rating table. In practice, although not recommended, the input voltages can exceed the VCC voltage by approximately 3.0 V and decrease below the VEE voltage by 0.3 V without causing product damage, although output phase reversal may occur. It is also possible to source up to approximately 5.0 mA of current from VEE through either inputs clamping diode without damage or latching, although phase reversal may again occur. If one or both inputs exceed the upper common mode voltage limit, the amplifier output is readily predictable and may be in a low or high state depending on the existing input bias conditions. 10 MOTOROLA ANALOG IC DEVICE DATA MC34071,2,4,A MC33071,2,4,A Since the input capacitance associated with the small geometry input device is substantially lower (2.5 pF) than the typical JFET input gate capacitance (5.0 pF), better frequency response for a given input source resistance can be achieved using the MC34071 series of amplifiers. This performance feature becomes evident, for example, in fast settling D-to-A current to voltage conversion applications where the feedback resistance can form an input pole with the input capacitance of the op amp. This input pole creates a 2nd order system with the single pole op amp and is therefore detrimental to its settling time. In this context, lower input capacitance is desirable especially for higher values of feedback resistances (lower current DACs). This input pole can be compensated for by creating a feedback zero with a capacitance across the feedback resistance, if necessary, to reduce overshoot. For 2.0 k of feedback resistance, the MC34071 series can settle to within 1/2 LSB of 8 bits in 1.0 s, and within 1/2 LSB of 12-bits in 2.2 s for a 10 V step. In a inverting unity gain fast settling configuration, the symmetrical slew rate is 13 V/s. In the classic noninverting unity gain configuration, the output positive slew rate is +10 V/s, and the corresponding negative slew rate will exceed the positive slew rate as a function of the fall time of the input waveform. Since the bipolar input device matching characteristics are superior to that of JFETs, a low untrimmed maximum offset voltage of 3.0 mV prime and 5.0 mV downgrade can be economically offered with high frequency performance characteristics. This combination is ideal for low cost precision, high speed quad op amp applications. The all NPN output stage, shown in its basic form on the equivalent circuit schematic, offers unique advantages over the more conventional NPN/PNP transistor Class AB output stage. A 10 k load resistance can swing within 1.0 V of the positive rail (VCC), and within 0.3 V of the negative rail (VEE), providing a 28.7 Vpp swing from 15 V supplies. This large output swing becomes most noticeable at lower supply voltages. The positive swing is limited by the saturation voltage of the current source transistor Q7, and VBE of the NPN pull up transistor Q17, and the voltage drop associated with the short circuit resistance, R7. The negative swing is limited by the saturation voltage of the pull-down transistor Q16, the voltage drop ILR6, and the voltage drop associated with resistance R7, where IL is the sink load current. For small valued sink currents, the above voltage drops are negligible, allowing the negative swing voltage to approach within millivolts of VEE. For large valued sink currents (>5.0 mA), diode D3 clamps the voltage across R6, thus limiting the negative swing to the saturation voltage of Q16, plus the forward diode drop of D3 (VEE +1.0 V). Thus for a given supply voltage, unprecedented peak-to-peak output voltage swing is possible as indicated by the output swing specifications. If the load resistance is referenced to VCC instead of ground for single supply applications, the maximum possible output swing can be achieved for a given supply voltage. For light load currents, the load resistance will pull the output to VCC during the positive swing and the output will pull the load resistance near ground during the negative swing. The load resistance value should be much less than that of the feedback resistance to maximize pull up capability. Because the PNP output emitter-follower transistor has been eliminated, the MC34071 series offers a 20 mA minimum current sink capability, typically to an output voltage of (VEE +1.8 V). In single supply applications the output can directly source or sink base current from a common emitter NPN transistor for fast high current switching applications. In addition, the all NPN transistor output stage is inherently fast, contributing to the bipolar amplifier's high gain bandwidth product and fast settling capability. The associated high frequency low output impedance (30 typ @ 1.0 MHz) allows capacitive drive capability from 0 pF to 10,000 pF without oscillation in the unity closed loop gain configuration. The 60 phase margin and 12 dB gain margin as well as the general gain and phase characteristics are virtually independent of the source/sink output swing conditions. This allows easier system phase compensation, since output swing will not be a phase consideration. The high frequency characteristics of the MC34071 series also allow excellent high frequency active filter capability, especially for low voltage single supply applications. Although the single supply specifications is defined at 5.0 V, these amplifiers are functional to 3.0 V @ 25C although slight changes in parametrics such as bandwidth, slew rate, and DC gain may occur. If power to this integrated circuit is applied in reverse polarity or if the IC is installed backwards in a socket, large unlimited current surges will occur through the device that may result in device destruction. Special static precautions are not necessary for these bipolar amplifiers since there are no MOS transistors on the die. As with most high frequency amplifiers, proper lead dress, component placement, and PC board layout should be exercised for optimum frequency performance. For example, long unshielded input or output leads may result in unwanted input-output coupling. In order to preserve the relatively low input capacitance associated with these amplifiers, resistors connected to the inputs should be immediately adjacent to the input pin to minimize additional stray input capacitance. This not only minimizes the input pole for optimum frequency response, but also minimizes extraneous "pick up" at this node. Supply decoupling with adequate capacitance immediately adjacent to the supply pin is also important, particularly over temperature, since many types of decoupling capacitors exhibit great impedance changes over temperature. The output of any one amplifier is current limited and thus protected from a direct short to ground. However, under such conditions, it is important not to allow the device to exceed the maximum junction temperature rating. Typically for 15 V supplies, any one output can be shorted continuously to ground without exceeding the maximum temperature rating. MOTOROLA ANALOG IC DEVICE DATA 11 MC34071,2,4,A MC33071,2,4,A (Typical Single Supply Applications VCC = 5.0 V) Figure 37. AC Coupled Noninverting Amplifer VCC 5.1 M VO 0 3.7 Vpp 0 3.7 Vpp Figure 38. AC Coupled Inverting Amplifier VCC 100 k 20 k Cin 1.0 M + MC34071 CO VO 68 k Cin 10 k + MC34071 36.6 mVpp Vin 1.0 k - 100 k AV = 101 BW (-3.0 dB) = 45 kHz 10 k RL - CO VO 10 k RL Vin 370 mVpp 100 k AV = 10 BW (-3.0 dB) = 450 kHz Figure 39. DC Coupled Inverting Amplifer Maximum Output Swing Figure 40. Unity Gain Buffer TTL Driver 2.5 V VO 2.63 V 4.75 Vpp 91 k VCC 0 Vin + MC34071 0 to 10,000 pF MC54/74XX 5.1 k RL 5.1 k 100 k + MC34071 - Cable TTL Gate VO - 1.0 M Figure 42. Active Bandpass Filter Vin AV = 10 BW (-3.0 dB) = 450 kHz R1 C 0.047 C 0.047 R3 2.2 k - MC34071 Figure 41. Active High-Q Notch Filter Vin 0.2 Vdc R Vin 16 k C 0.01 R 16 k Vin 1.1 k R2 5.6 k + VO fo = 30 kHz Ho = 10 Ho = 1.0 VCC - MC34071 VO Given fo = Center Frequency AO = Gain at Center Frequency Choose Value fo, Q, Ao, C Then: R3 = fo = 1.0 kHz 1 fo = 4RC Q R3 R1 = foC 2Ho 0.4 VCC + R2 = R1 R3 4Q2R1-R3 Qofo GBW < 0.1 32 k 2.0 R For less than 10% error from operational amplifier where fo and GBW are expressed in Hz. GBW = 4.5 MHz Typ. 2.0 C 0.02 2.0 C 0.02 12 MOTOROLA ANALOG IC DEVICE DATA MC34071,2,4,A MC33071,2,4,A Figure 43. Low Voltage Fast D/A Converter CF 2.0 V Vin VO VCC 1.0 V Bit Switches (R-2R) Ladder Network Settling Time 1.0 s (8-Bits, 1/2 LSB) 0.1 Delay 1.0 s t + MC34071 Figure 44. High Speed Low Voltage Comparator Vin RF 5.0 k 5.0 k 5.0 k - MC34071 VO t VO 4.0 V 13 V/s 0.2 s Delay 25 V/s 2.0 k RL - 10 k 10 k 10 k + Figure 45. LED Driver VCC "ON" Vin < Vref Figure 46. Transistor Driver VCC VCC RL Vin Vref + MC34071 + MC34071 + MC34071 - - RL "ON" Vin > Vref (A) PNP - (B) NPN Figure 47. AC/DC Ground Current Monitor Figure 48. Photovoltaic Cell Amplifier ILoad RF + MC34071 ICell VO - MC34071 VO - Ground Current Sense Resistor RS R1 R2 VO = ILoad RS + 1+ R1 R2 VCell = 0 V For VO > 0.1V BW ( -3.0 dB) = GBW R2 R1+R2 VO = ICell RF VO > 0.1 V MOTOROLA ANALOG IC DEVICE DATA 13 MC34071,2,4,A MC33071,2,4,A Figure 49. Low Input Voltage Comparator with Hysteresis VO R2 Vref R1 + MC34071 Figure 50. High Compliance Voltage to Sink Current Converter Iout Hysteresis VOH VOL Vin VinL VinH Vref Vin + MC34071 - Vin R1 VinL = (V -V )+V R1+R2 OL ref ref R1 VinH = (V -V )+V R1+R2 OH ref ref R1 VH = (VOH -VOL) R1+R - Iout = VinVIO R R Figure 51. High Input Impedance Differential Amplifier R1 R2 R4 Figure 52. Bridge Current Amplifier +Vref RF R R - MC34071 - 1/2 MC34072 R3 - 1/2 MC34072 + VO R = R R VO +V1 +V2 + + R RF 2R2 R2 R4 = (Critical to CMRR) R1 R3 R4 R4 VO = 1 + V2-V1 R3 R3 For (V2 V1), V > 0 R < < R RF > > R RF VO = Vref (VO 0.1 V) Figure 53. Low Voltage Peak Detector fOSC Vin + MC34071 Figure 54. High Frequency Pulse Width Modulation ^ 0.85 RC V VP t + IB 0 - + ISC t Base Charge Removal Iout - 1/2 MC34072 + 100 k 100 k 47 k VP Pulse Width Control Group R + 1/2 MC34072 - VO = Vin (pk) - + RL VP 10,000 pF C Vin VP V+ IB t OSC Comparator High Current Output 14 MOTOROLA ANALOG IC DEVICE DATA MC34071,2,4,A MC33071,2,4,A GENERAL ADDITIONAL APPLICATIONS INFORMATION VS = 15.0 V Figure 55. Second Order Low-Pass Active Filter C2 0.02 R1 560 R3 510 R2 5.6 k - MC34071 Figure 56. Second Order High-Pass Active Filter C2 0.05 C1 1.0 R1 46.1 k - C1 1.0 fo = 1.0 kHz Ho = 10 MC34071 R2 1.1 k + C1 0.44 fo = 100 Hz Ho = 20 Ho+0.5 foC1 2 2 + Choose: fo, Ho, C2 Then: C1 = 2C2 (Ho+1) R2 = 2 4foC2 R3 = R2 Ho+1 R1 = R2 Ho Choose: fo, Ho, C1 Then: R1 = R2 = 2foC1 (1/Ho+2) C C2 = Ho Figure 57. Fast Settling Inverter CF* RF 2.0 k VO = 10 V Step Figure 58. Basic Inverting Amplifier + R1 MC34071 VO RL - - MC34071 Vin VO R2 + I Uncompensated High Speed DAC *Optional Compensation Compensated ts = 1.0 s to 1/2 LSB (8-Bits) ts = 2.2 s to 1/2 LSB (12-Bits) SR = 13 V/s VO R2 = BW (-3.0 dB) = GBW Vin R1 R1 R1 +R2 SR = 13 V/s Figure 59. Basic Noninverting Amplifier Figure 60. Unity Gain Buffer (AV = +1.0) + MC34071 VO Vin + MC34071 - Vin R2 RL R1 VO - VO = Vin 1+ R2 R1 R1 R1 +R2 BWp = 200 kHz VO = 20 Vpp SR = 10 V/s BW (-3.0 dB) = GBW MOTOROLA ANALOG IC DEVICE DATA 15 MC34071,2,4,A MC33071,2,4,A Figure 61. High Impedance Differential Amplifier + MC34074 R R - R - RE R MC34074 VO + - MC34074 R + R Example: Let: R = RE = 12 k Then: AV = 3.0 BW = 1.5 MHz R AV = 1 + 2 RE Figure 62. Dual Voltage Doubler +VO + MC34074 + 10 10 + RL 100 k +10 - MC34074 - 220 pF + 100 k -10 + + + 10 -VO 10 RL RL +VO 18.93 18 15.4 10 k 5.0 k -VO -18.78 -18 -15.4 MC34074 100 k - 16 MOTOROLA ANALOG IC DEVICE DATA MC34071,2,4,A MC33071,2,4,A OUTLINE DIMENSIONS P SUFFIX PLASTIC PACKAGE CASE 626-05 ISSUE K 8 5 -B- 1 4 NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC --- 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC --- 10_ 0.030 0.040 F NOTE 2 -A- L C -T- SEATING PLANE J N D K M M H G 0.13 (0.005) TA M B M D SUFFIX PLASTIC PACKAGE CASE 751-05 (SO-8) ISSUE R NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS ARE IN MILLIMETERS. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE MOLD PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.18 0.25 4.80 5.00 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ A 8 D 5 C E 1 4 H 0.25 M B M h B C e A SEATING PLANE X 45 _ q L 0.10 A1 0.25 B M CB S A S q MOTOROLA ANALOG IC DEVICE DATA 17 MC34071,2,4,A MC33071,2,4,A OUTLINE DIMENSIONS P SUFFIX PLASTIC PACKAGE CASE 646-06 ISSUE L NOTES: 1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 4. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M N INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.300 BSC 0_ 10_ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.62 BSC 0_ 10_ 0.39 1.01 14 8 B 1 7 A F C N H G D SEATING PLANE L J K M D SUFFIX PLASTIC PACKAGE CASE 751A-03 (SO-14) ISSUE F -A- 14 8 -B- 1 7 P 7 PL 0.25 (0.010) M B M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. G C R X 45 _ F -T- SEATING PLANE D 14 PL 0.25 (0.010) M K TB S M A S J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 18 MOTOROLA ANALOG IC DEVICE DATA MC34071,2,4,A MC33071,2,4,A Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. MOTOROLA ANALOG IC DEVICE DATA 19 MC34071,2,4,A MC33071,2,4,A How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 or 602-303-5454 MFAX: RMFAX0@email.sps.mot.com - TOUCHTONE 602-244-6609 INTERNET: http://Design-NET.com JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 20 *MC34071/D* MOTOROLA ANALOG IC DEVICE DATA MC34071/D |
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